This invention relates to a semiconductor memory device having extremely high reliability. More specifically, the present invention relates to a semiconductor memory device formed by bipolar transistors.
Generally, a semiconductor substrate having circuit elements such as transistors formed thereon is sealed by a seal member such as an ordinary ceramic package produced by fusing two ceramic sheets together using glass, a ceramic package produced by combining a metal cap with a ceramic sheet, a plastic package or the like. This packaging work provides a semiconductor device. Of the packages used for the semiconductor device, the ceramic material for the ceramic package especially contains several parts per million of impurities such as uranium and thorium.
On the other hand, fine powder of alumina or the like called a "filler" is employed in the material for the plastic package and this filler also contains the abovementioned impurities.
It is known that these impurities emit .alpha.-particles or rays which especially invert the stored data of a dynamic memory circuit formed by MOS type (Metal-Oxide-Semiconductor type) transistors in the semiconductor substrate and cause soft error, as disclosed in "NIKKEI ELECTRONICS", November 27 issue, 1978, pages 123-139 published in Japan, for example.
According to the researches and experiments carried out by the inventors of this invention, it has also been clarified that the soft error due to the .alpha.-rays occurs also in a semiconductor device of a static type bipolar memory circuit to be described next.
As illustrated in FIG. 1, a heretofore known bipolar memory cell circuit consists of resistors R.sub.21 and R.sub.22, diodes D.sub.21 and D.sub.22 and multi-emitter transistors Q.sub.21 and Q.sub.22. Common connection line of the diodes D.sub.21, D.sub.22 and the resistors R.sub.21, R.sub.22 is connected to a word line +W. One of the emitters of the transistor Q.sub.21 is connected to a bit line B.sub.0 while that of the transistor Q.sub.22 is likewise connected to a bit line B.sub.1. The other emitters of both transistors Q.sub.21 and Q.sub.22 are commonly connected to a data-holding constant current source I.sub.ST.
The above-described bipolar memory cell circuit is known in the art from U.S. Pat. No. 3,537,078, for example. Data holding is made by a bistable circuit, that is, by means of the stable state of a flip-flop circuit. In other words, when a potential difference occurs between the bases of the transistors Q.sub.21 and Q.sub.22, positive feedback is applied to the input due to cross-coupling of the collector to the base so that one of the transistors Q.sub.21 and Q.sub.22 having a higher base potential is turned on while the other is turned off, thereby establishing one stable state.
This data-holding capacity is determined d.c.-wise by the potential difference between the bases of the transistors Q.sub.21 and Q.sub.22 under the stable state. Also, it is determined a.c.-wise by high frequency characteristics of the transistors such as current amplification factor, high frequency gain-bandwidth product, base resistance, stray capacitance, and so forth and by high frequency characteristics of the resistors (R.sub.21, R.sub.22) and diodes (D.sub.21, D.sub.22) connected as load to the collectors of the transistors, from the viewpoint that the flip-flop circuit is easier to inverse.
To enhance the data-holding capacity, the high frequency characteristics by these circuit elements may be deteriorated. In order for the speed of the bipolar memory to be increased, however, these characteristics must be improved. In a ultra-high speed bipolar memory, therefore, the data-holding capacity lowers inevitably along with the increase in the speed.
The undesirable data inversion of the bipolar memory resulting from the .alpha.-rays may be explained in the following manner.
In the semiconductor substrate forming the bipolar memory circuit, if the .alpha.-rays emitted from the package sealing the substrate are incident into the substrate, hole-electron pairs are generated in the incident path of the .alpha.-rays due to their energy loss. The hole-electron pairs are collected through the collector-base depletion layer of the transistor and through the depletion layer between the collector region and the substrate and generate a noise current. In FIG. 1, when the transistor Q.sub.21 is turned on with the transistor Q.sub.22 off, the collector potential V.sub.c1 of the transistor Q.sub.22 is higher than the collector potential V.sub.co of the transistor Q.sub.21 during normal operation as represented by solid line in FIG. 2. However, the hole-electron pairs that are formed upon incidence of the .alpha.-rays into the substrate and collected by the collector-base depletion layer generate the noise current I.sub.n. This noise current I.sub.n flows through parasitic capacitance C.sub.22 between the collector-base regions of the transistor Q.sub.22 and lowers the collector potential V.sub.c1 of the transistor Q.sub.22. Consequently, the flip-flop memory cell starts inversing and shifts to one of stable states as represented by dotted line and one-dot chain line in FIG. 2. Thus, there occurs perfect data inversion.
As described above, it has been found that the soft error takes place also in the bipolar memory circuit.